Intel to unveil 'next-generation architecture'

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CEO Paul Otellini to detail Meron, Conroe and Woodcrest, due in late 2006

By Tom Krazit, IDG News Service
August 11, 2005

Intel (Profile, Products, Articles) Corp. plans to introduce a major change in the architecture used to build its chips during its upcoming Fall Intel Developer Forum (IDF) in San Francisco.

The highlight of Chief Executive Officer Paul Otellini's keynote speech on Aug. 23 will be the announcement of Intel's "next-generation architecture," which will arrive in the second half of 2006, said Rob Chapman, general manager for IDF, in a briefing earlier this week. The target date for its introduction coincides with the launch of previously announced processors that sources have said will use a common architecture based on power-friendly design principles.

Earlier this year, Otellini announced that Merom, Conroe and Woodcrest were the code names for Intel's next generation of multicore processors slated for late 2006, but he declined to discuss them in detail. However, for some time Intel has been expected to base this generation of processors on an architecture inspired by its Pentium M notebook processor, which de-emphasizes clock speed and concentrates on managing power consumption.

The move appears to signal the end of the Netburst architecture, which has been the foundation of the Pentium 4 and Xeon chips for five years. That architecture was designed to let Intel steadily increase the clock speeds of its chips; however, the advent of the 90-nanometer process generation and the current leakage problems associated with that technology put an end to that strategy. As clock speeds go up, more power is needed to reach those speeds, and that power is more prone to leak out of transistors made with the current generation of chip-making equipment.
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http://www.infoworld.com/article/05/08/11/HNintelnextgen_1.html?source=NLC-TB2005-08-12